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| AT49LL080 Datasheet, PDF (19/31 Pages) ATMEL Corporation – 8-megabit Low-pin Count Flash Memory | |||
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AT49LL080
Absolute Maximum Ratings*
Voltage on Any Pin
(except VPP) .................................-0.5V to +VCC + 0.5V(1)(2)(4)
VPP Voltage ............................................ -0.5V to +13.0V(1)(2)(3)
*NOTICE:
Stresses beyond those listed under âAbsolute
Maximum Ratingsâ may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Notes:
1. All specified voltages are with respect to GND. Minimum DC voltage on the VPP pin is -0.5V. During transitions, this level may
undershoot to -2.0V for periods of <20 ns. During transitions, this level may overshoot to VCC + 2.0V for periods <20 ns.
2. Maximum DC voltage on VPP may overshoot to +13.0V for periods <20 ns.
3. Connection to supply of VHH is allowed for a maximum cumulative period of 80 hours.
4. Do not violate processor or chipset limitations on the INIT pin.
Operating Conditions
Temperature and VCC
Symbol
Parameter
Test Condition
Min
Max
Unit
TC
Operating Temperature(1)
Case Temperature
0
+85
°C
VCC
VCC Supply Voltage
3.0
3.6
V
Note: 1. This temperature requirement is different from the normal commercial operating condition of Flash memories.
LPC Interface DC Input/Output Specifications
Symbol
Parameter
Conditions
Min
Max
Units
VIH(3)
VIH (INIT)(5)
VIL (INIT)(5)
VIL(3)
IIL(4)
Input High Voltage
INIT Input High Voltage
INIT Input Low Voltage
Input Low Voltage
Input Leakage Current(1)
0 < VIN < VCC
0.5 VCC
VCC + 0.5
V
1.35
VCC + 0.5
V
0.85
V
-0.5
0.3 VCC
V
±10
µA
VOH
Output High Voltage
IOUT = -500 µA
0.9 VCC
V
VOL
Output Low Voltage
IOUT = 1500 µA
0.1 VCC
V
CIN
Input Pin Capacitance
13
pF
CCLK
Lpin(2)
CLK Pin Capacitance
Recommended Pin Inductance
3
12
pF
20
nH
Notes:
1. Input leakage currents include high-Z output leakage for all bi-directional buffers with tri-state outputs.
2. Refer to PCI spec.
3. Inputs are not â5-volt safe.â
4. IIL may be changed on IC and ID pins (up to 200 µA) if pulled against internal pull-downs. Refer to the pin descriptions.
5. Do not violate processor or chipset specifications regarding the INIT pin voltage.
19
3273CâFLASHâ5/03
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