AT49LL080 Datasheet, PDF(15/31 Page) ATMEL Corporation – 8-megabit Low-pin Count Flash Memory

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AT49LL080 Datasheet, PDF (15/31 Pages) ATMEL Corporation – 8-megabit Low-pin Count Flash Memory

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3273CâFLASHâ5/03

AT49LL080

READ ARRAY: Upon initial device power-up and after exit from reset, the device

defaults to read array mode. This operation is also initiated by writing the Read Array

command. The device remains enabled for reads until another command is written.

Once the internal state machine (WSM) has started a block erase or program operation,

the device will not recognize the Read Array Command until the operation is completed,

unless the operation is suspended via an Erase Suspend or Program Suspend Com-

mand. The Read Array command functions independently of the VPP voltage.

PRODUCT IDENTIFICATION: The product identification mode identifies the device and

manufacturer as Atmel.

Following the Product ID Entry command, read cycles from the addresses shown in

Table 11 retrieve the manufacturer and device code. To exit the product identification

mode, any valid command can be written to the device. The Product ID Entry command

functions independently of the VPP voltage.

Table 11. Identifier Codes

Code

Address (AID)

Data

Manufacturer Code

00000

1FH

Device Code

00001

EBH

SECTOR ERASE: Before a byte can be programmed, it must be erased. The erased

state of the memory bits is a logical â1â. Since the AT49LL080 does not offer a complete

chip erase, the device is organized into multiple sectors that can be individually erased.

The Sector Erase command is a two-bus cycle operation.

Successful sector erase requires that the corresponding sectorâs Write Lock bit be

cleared and the corresponding write-protect pin (TBL or WP) be inactive. If sector erase

is attempted when the sector is locked, the sector erase will fail, with the reason for fail-

ure in the status register.

Successful sector erase only occurs when VPP = VPPH1 or VPPH2. If the erase operation is

attempted at VPP â VPPH1 or VPPH2 erratic results may occur.

BYTE PROGRAMMING: The device is programmed on a byte-by-byte basis. Program-

ming is accomplished via the internal device command register and is a two-bus cycle

operation. The programming address and data are latched in the second bus cycle. The

device will automatically generate the required internal programming pulses. Please

note that a â0â cannot be programmed back to a â1â; only an erase operation can convert

â0âs to â1âs.

After the program command is written, the device automatically outputs the status regis-

ter data when read. When programming is complete, the status register may be

checked. If a program error is detected, the status register should be cleared before cor-

rective action is taken by the software. The internal WSM verification Error Checking

only detects â1âs that do not successfully program to â0âs.

Reliable programming only occurs when VPP = VPPH1 or VPPH2. If the program operation

is attempted at VPP â VPPH1 or VPPH2 erratic results may occur.

A successful program operation also requires that the corresponding sectorâs Write Lock

bit be cleared, and the corresponding write-protect pin (TBL or WP) be inactive. If a pro-

gram operation is attempted when the sector is locked, the operation will fail.

ERASE SUSPEND: The Erase Suspend command allows sector-erase interruption to

read or program data in another sector of memory. Once the sector erase process

starts, writing the sector erase suspend command requests that the WSM suspend the

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