PC7447A Datasheet, PDF (18/44 Pages) ATMEL Corporation – PowerPC RISC microprocessor

6.4.4.5
Bus-to-Core Multiplier Constraints with DFS
DFS is not available for all bus-to-core multipliers as configured by PLL_CFG[0:4] during hard
reset. Specifically, because the PC7447A does not support quarter clock ratios or the 1x multi-
plier, the DFS feature is limited to integer PLL multipliers of 4x and higher. The complete listing
is shown in Table 6-5 on page 18.
Table 6-5. Valid Divide Ratio Configurations
Bus-to-Core Multiplier Configured by
PLL_CFG[0:4] (see Table 13-1 on page 35)
2x
3x
4x
5x
5.5x
6x
6.5x
7x
7.5x
8x
8.5x
9x
9.5x
10x
10.5x
11x
11.5x
12x
12.5x
13x
13.5x
14x
15x
16x
17x
18x
20x
21x
24x
28x
Bus-to-Core Multiplier with
HID1[DFS1] = 1 (÷2)
N/A
N/A
2x
2.5x
2x
3x
N/A
3.5x
N/A
4x
N/A
4.5x
N/A
5x
N/A
5.5x
N/A
6x
N/A
6.5x
N/A
7x
7.5x
8x
8.5x
9x
10x
10.5x
12x
14x
18 PC7447A [Preliminary]
5387B–HIREL–07/05