ATTINY261A_1 Datasheet, PDF (177/292 Pages) ATMEL Corporation – 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash

ATtiny261A/461A/861A
18.7.2
18.7.3
18.7.4
Entering Programming Mode
The following algorithm puts the device in parallel programming mode:
1. Apply 4.5 - 5.5V between V_CC and GND.
2. Set RESET to “0” and toggle XTAL1 at least six times.
3. Set Prog_enable pins listed in Table 18-13 on page 176 to “0000” and wait at least 100
ns.
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns after
+12V has been applied to RESET, will cause the device to fail entering programming
mode.
5. Wait at least 50 µs before sending a new command.
Considerations for Efficient Programming
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered:
• The command needs only be loaded once when writing or reading multiple memory
locations.
• Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless the
EESAVE Fuse is programmed) and Flash after a Chip Erase.
• Address high byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
Chip Erase
The Chip Erase will erase the Flash and EEPROM memories plus lock bits. The Lock bits are
not reset until the program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or EEPROM are
reprogrammed.
1. Load Command “Chip Erase”:
a. Set XA1, XA0 to “10”. This enables command loading.
b. Set BS1 to “0”.
c. Set DATA to “1000 0000”. This is the command for Chip Erase.
d. Give XTAL1 a positive pulse. This loads the command.
e. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.
f. Wait until RDY/BSY goes high before loading a new command.
18.7.5
Note: The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.
Programming the Flash
The Flash is organized in pages, see Table 18-7 on page 170. When programming the Flash,
the program data is latched into a page buffer. This allows one page of program data to be pro-
grammed simultaneously. The following procedure describes how to program the entire Flash
memory (see Figure 18-5 for signal waveforms):
8197A–AVR–10/09
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