ATMEGA169V_14 Datasheet, PDF (173/365 Pages) ATMEL Corporation – Non-volatile Program and Data Memories

ATmega169/V
USART Control and Status
Register C – UCSRC
Bit
Read/Write
Initial Value
7
6
5
4
3
2
1
0
–
UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL UCSRC
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
1
1
0
• Bit 6 – UMSEL: USART Mode Select
This bit selects between asynchronous and synchronous mode of operation.
Table 74. UMSEL Bit Settings
UMSEL
Mode
0
Asynchronous Operation
1
Synchronous Operation
• Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The Receiver will generate a parity value for the incoming data and com-
pare it to the UPM0 setting. If a mismatch is detected, the UPE Flag in UCSRA will be
set.
Table 75. UPM Bits Settings
UPM1
UPM0
0
0
0
1
1
0
1
1
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 76. USBS Bit Settings
USBS
0
1
Stop Bit(s)
1-bit
2-bit
2514P–AVR–07/06
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