ATMEGA640V_0701 Datasheet, PDF (168/449 Pages) ATMEL Corporation – 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash

ICR1H and ICR1L – Input
Capture Register 1
ICR3H and ICR3L – Input
Capture Register 3 –
ICR4H and ICR4L – Input
Capture Register 4
ICR5H and ICR5L – Input
Capture Register 5
Bit
(0x87)
(0x86)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
ICR1[15:8]
ICR1H
ICR1[7:0]
ICR1L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit
(0x97)
(0x96)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
ICR3[15:8]
ICR3H
ICR3[7:0]
ICR3L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit
(0xA7)
(0xA6)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
ICR4[15:8]
ICR4H
ICR4[7:0]
ICR4L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit
(0x127)
(0x126)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
ICR5[15:8]
ICR5H
ICR5[7:0]
ICR5L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
The Input Capture is updated with the counter (TCNTn) value each time an event occurs
on the ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1).
The Input Capture can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes
are read simultaneously when the CPU accesses these registers, the access is per-
formed using an 8-bit temporary High Byte Register (TEMP). This temporary register is
shared by all the other 16-bit registers. See “Accessing 16-bit Registers” on page 139.
168 ATmega640/1280/1281/2560/2561
2549K–AVR–01/07