AT89LP51RB2_14 Datasheet, PDF (164/254 Pages) ATMEL Corporation – 8-bit Microcontroller Compatible with 8051 Products

21. Digital-to-Analog/Analog-to-Digital Converter
The AT89LP51RB2/RC2/IC2 includes a 10-bit Data Converter (DADC) with the following
features:
• Digital-to-Analog (DAC) or Analog-to-Digital (ADC) Mode
• 10-bit Resolution
• 6.5 µs Conversion Time
• 7 Multiplexed Single-ended Channels or 3 Differential Channels
• Internal Temperature Sensor or Supply Voltage Channels
• Selectable 1.0V±10% Internal Reference Voltage
• Optional Left-Adjust of Conversion Results
• Single Conversion or Timer-triggered Mode
• Interrupt on Conversion Complete
The AT89LP51RB2/RC2/IC2 features a 10-bit successive approximation data converter that
functions in either Analog-to-Digital (ADC) or Digital-to-Analog (DAC) mode. A block diagram of
the converter is shown in Figure 21-1. An 8-channel Analog Multiplexer connects eight single-
ended or four differential voltage inputs from the pins of Port 0 to a sample-and-hold circuit that
in turn provides an input to the successive approximation block. The Sample-and-Hold circuit
ensures that the input voltage to the ADC is held at a constant level during conversion. The SAR
block digitizes the analog voltage into a 10-bit value accessible through a data register. The
SAR block also operates in reverse to generate an analog voltage on Port 2 from a 10-bit digital
value.
ADC results are available in the DADL and DADH register pair. The ADC result scale is deter-
mined by the reference voltage (VREF) generated either internally from a 1.0V reference or
externally from VDD/2. The ADC results are always represented in signed 2’s complement form,
with single-ended voltage channels referring to the level above or below VDD/2. The 10-bit
results may be right or left adjusted within the 16-bit register. The sign is extended through the 6
MSBs of right-adjusted results and the 6 LSBs of left-adjusted results are zeroed. If only 8-bit
precision is required, the user should select left-adjusted by setting LADJ in DADC and read only
the DADH register. Example results are listed in Table 21-1.
The conversion formulas are as follows:
(Singled-Ended)
ADC
=
511 ×
V_{-----I-N-----–-----}(_--V_{----D----D-----}⁄_-----2_----)_-
V_REF
(Differential)
ADC
=
511 ×
-^V----^I-^N---⁺-----–----^V-----^I-^N---^-
V_REF
Conversion results can be converted into unsigned binary by adding 02h to DADH in right-
adjusted mode or 80h to DADH in left-adjusted mode. When using the external reference
(VDD/2) in single-ended mode this is equivalent to:
(Unsigned Singled-Ended)
ADC
=
1023 ×
--^V----^I-^N---
V_DD
164 AT89LP51RB2/RC2/IC2 Preliminary
3722A–MICRO–10/11