AT91M55800A_14 Datasheet, PDF (149/256 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

18.10.3 USART Interrupt Enable Register
Name:
US_IER
Access Type:
Write-only
Offset:
0x08
31
30
29
–
–
–
23
22
21
–
–
–
15
14
13
–
–
–
7
PARE
6
FRAME
5
OVRE
28
–
20
–
12
–
4
ENDTX
27
–
19
–
11
–
3
ENDRX
• RXRDY: Enable RXRDY Interrupt (Code Label US_RXRDY)
0 = No effect.
1 = Enables RXRDY Interrupt.
26
–
18
–
10
–
2
RXBRK
• TXRDY: Enable TXRDY Interrupt (Code Label US_TXRDY)
0 = No effect.
1 = Enables TXRDY Interrupt.
• RXBRK: Enable Receiver Break Interrupt (Code Label US_RXBRK)
0 = No effect.
1 = Enables Receiver Break Interrupt.
• ENDRX: Enable End of Receive Transfer Interrupt (Code Label US_ENDRX)
0 = No effect.
1 = Enables End of Receive Transfer Interrupt.
• ENDTX: Enable End of Transmit Transfer Interrupt (Code Label US_ENDTX)
0 = No effect.
1 = Enables End of Transmit Transfer Interrupt.
• OVRE: Enable Overrun Error Interrupt (Code Label US_OVRE)
0 = No effect.
1 = Enables Overrun Error Interrupt.
• FRAME: Enable Framing Error Interrupt (Code Label US_FRAME)
0 = No effect.
1 = Enables Framing Error Interrupt.
• PARE: Enable Parity Error Interrupt (Code Label US_PARE)
0 = No effect.
1 = Enables Parity Error Interrupt.
AT91M5880A
25
–
17
–
9
TXEMPTY
1
TXRDY
24
–
16
–
8
TIMEOUT
0
RXRDY
1745F–ATARM–06-Sep-07
149