ATMEGA3250V_14 Datasheet, PDF (143/362 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

ATmega325/3250/645/6450
For Timer/Counter2, the possible prescaled selections are: clk_T2S/8, clk_T2S/32, clk_T2S/64,
clk_T2S/128, clk_T2S/256, and clk_T2S/1024. Additionally, clk_T2S as well as 0 (stop) may be selected.
Setting the PSR2 bit in GTCCR resets the prescaler. This allows the user to operate with a pre-
dictable prescaler.
18.11 Register Description
18.11.1
TCCR2A – Timer/Counter Control Register A
Bit
(0xB0)
Read/Write
Initial Value
7
FOC2A
W
0
6
WGM20
R/W
0
5
COM2A1
R/W
0
4
COM2A0
R/W
0
3
WGM21
R/W
0
2
CS22
R/W
0
1
CS21
R/W
0
0
CS20
R/W
0
TCCR2A
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode. However, for ensur-
ing compatibility with future devices, this bit must be set to zero when TCCR2A is written when
operating in PWM mode. When writing a logical one to the FOC2A bit, an immediate compare
match is forced on the Waveform Generation unit. The OC2A output is changed according to its
COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a strobe. Therefore it is the
value present in the COM2A1:0 bits that determines the effect of the forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6, 3 – WGM21:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum (TOP)
counter value, and what type of waveform generation to be used. Modes of operation supported
by the Timer/Counter unit are: Normal mode, Clear Timer on Compare match (CTC) mode, and
two types of Pulse Width Modulation (PWM) modes. See Table 18-2 and “Modes of Operation”
on page 135.
Table 18-2. Waveform Generation Mode Bit Description⁽¹⁾
WGM21 WGM20 Timer/Counter Mode
Mode (CTC2) (PWM2) of Operation
TOP
0
0
0
Normal
0xFF
1
0
1
PWM, Phase Correct 0xFF
2
1
0
CTC
OCR2A
3
1
1
Fast PWM
0xFF
Update of
OCR2A at
Immediate
TOP
Immediate
BOTTOM
TOV2 Flag
Set on
MAX
BOTTOM
MAX
MAX
Note:
1. The CTC2 and PWM2 bit definition names are now obsolete. Use the WGM21:0 definitions.
However, the functionality and location of these bits are compatible with previous versions of
the timer.
2570N–AVR–05/11
143