AT80C5112_08 Datasheet, PDF (14/97 Pages) ATMEL Corporation – 8-bit Microcontroller with A/D Converter

AT8xC5112
Bit
Bit
Number Mnemonic Description
CPU clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all the
0
X2 peripherals.
Set to select 6clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2" bits.
Reset value = X000 0000b
Not bit addressable
Table 6. CKCON1 Register (AFh)
7
6
5
-
-
-
4
3
2
1
0
-
-
-
BRGX2 SPIX2
Bit
Number
7
6
5
4
3
2
1
0
Bit
Mnemonic
-
-
-
-
-
-
BRGX2
SPIX2
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BRG clock (This control bit is validated when the CPU clock X2 is set; when
X2 is low, this bit has no effect).
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
SPI clock (This control bit is validated when the CPU clock X2 is set; when X2
is low, this bit has no effect)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Reset value = XXXX XX00b
Not bit addressable
13
4191C–8051–02/08