45DB041B Datasheet, PDF (14/33 Pages) ATMEL Corporation – 4-megabit 2.5-volt Only or 2.7-volt Only DataFlash

Input Test Waveforms and Measurement Levels
AC
2.4V
DRIVING
LEVELS _0.45V
t_R, t_F < 3 ns (10% to 90%)
2.0 ^AC
MEASUREMENT
0.8 _LEVEL
Output Test Load
DEVICE
UNDER
TEST
30 pF
AC Waveforms
Two different timing diagrams are shown below. Waveform 1 shows the SCK signal
being low when CS makes a high-to-low transition, and Waveform 2 shows the SCK sig-
nal being high when CS makes a high-to-low transition. Both waveforms show valid
timing diagrams. The setup and hold times for the SI signal are referenced to the low-to-
high transition on the SCK signal.
Waveform 1 shows timing that is also compatible with SPI Mode 0, and Waveform 2
shows timing that is compatible with SPI Mode 3.
Waveform 1 – Inactive Clock Polarity Low and SPI Mode 0
CS
SCK
t_CSS
t_WH
t_WL
t_CSH
t_V
HIGH IMPEDANCE
SO
t_HO
VALID OUT
t_SU
tH
SI
VALID IN
t_CS
t_DIS
HIGH IMPEDANCE
Waveform 2 – Inactive Clock Polarity High and SPI Mode 3
CS
SCK
SO
SI
t_CSS
t_WL
t_WH
t_V
HIGH Z
t_SU
t_HO
VALID OUT
t_H
VALID IN
t_CSH
14 AT45DB041B
t_CS
t_DIS
HIGH IMPEDANCE
1938F–DFLSH–10/02