SAMD20G_14 Datasheet, PDF (129/676 Pages) ATMEL Corporation – SMART ARM-Based Microcontroller

15.8.10 APBC Mask
Name:
APBCMASK
Offset: 0x20
Reset:
0x00010000
Property: Write-Protected
Bit
31
30
29
28
27
26
25
24
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
PTC
DAC
AC
ADC
Access
R
R
R
R
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
1
Bit
15
14
13
12
11
10
9
8
TC7
TC6
TC5
TC4
TC3
TC2
TC1
TC0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
Access
Reset
7
SERCOM5
R/W
0
6
SERCOM4
R/W
0
5
SERCOM3
R/W
0
4
SERCOM2
R/W
0
3
SERCOM1
R/W
0
2
SERCOM0
R/W
0
1
EVSYS
R/W
0
0
PAC2
R/W
0
z Bits 31:20 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 19:0 – PTC, DAC, AC, ADC, TC7, TC6, TC5, TC4, TC3, TC2, TC1, TC0, SERCOM5, SERCOM4,
SERCOM3, SERCOM2, SERCOM1, SERCOM0, EVSYS, PAC2: APB Clock Enable
For any bit:
0: The APBC clock for the corresponding module is stopped.
1: The APBC clock for the corresponding module is enabled.
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129L–SAM-D20_datasheet–09/2014
129