ATA664251_14 Datasheet, PDF (129/290 Pages) ATMEL Corporation – 16K Flash Microcontroller with LIN Transceiver

● During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes
three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can
read the timer value causing the setting of the interrupt flag. The Output Compare pin is changed on the timer clock
and is not synchronized to the processor clock.
5.11.10 Timer/Counter0 Prescaler
Figure 5-41. Prescaler for Timer/Counter0
XTAL2
Oscillator
clk_I/O
0
0
XTAL1
1
1
clk_TnS
Clear
10-bit T/C Prescaler
EXCLK
ASn
PSRn
0
CSn0
CSn1
CSn2
Timer/Countern Clock Source
clk_Tn
The clock source for Timer/Counter0 is named clk_T0S. clk_T0S is by default connected to the main system I/O clock clk_IO. By
setting the AS0 bit in ASSR, Timer/Counter0 is asynchronously clocked from the XTAL oscillator or XTAL1 pin. This enables
use of Timer/Counter0 as a Real Time Counter (RTC).
A crystal can then be connected between the XTAL1 and XTAL2 pins to serve as an independent clock source for
Timer/Counter0.
A external clock can also be used using XTAL1 as input. Setting AS0 and EXCLK enables this configuration.
For Timer/Counter0, the possible prescaled selections are: clk_T0S/8, clk_T0S/32, clk_T0S/64, clk_T0S/128, clk_T0S/256, and
clk_T0S/1024. Additionally, clk_T0S as well as 0 (stop) may be selected. Setting the PSR0 bit in GTCCR resets the prescaler.
This allows the user to operate with a predictable prescaler.
ATA664251 [DATASHEET] 129
9269E–AUTO–06/14