ATMEGA32A_14 Datasheet, PDF (127/336 Pages) ATMEL Corporation – 8-bit Microcontroller with 32KBytes In-System Programmable Flash

18.11.6 TIFR – Timer/Counter Interrupt Flag Register
Bit
Read/Write
Initial Value
7
OCF2
R/W
0
6
TOV2
R/W
0
5
ICF1
R/W
0
4
OCF1A
R/W
0
3
OCF1B
R/W
0
2
TOV1
R/W
0
1
OCF0
R/W
0
0
TOV0
R/W
0
TIFR
• Bit 7 – OCF2: Output Compare Flag 2
The OCF2 bit is set (one) when a compare match occurs between the Timer/Counter2 and the data in OCR2 –
Output Compare Register2. OCF2 is cleared by hardware when executing the corresponding interrupt handling
vector. Alternatively, OCF2 is cleared by writing a logic one to the flag. When the I-bit in SREG, OCIE2
(Timer/Counter2 Compare match Interrupt Enable), and OCF2 are set (one), the Timer/Counter2 Compare match
Interrupt is executed.
• Bit 6 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by hardware when execut-
ing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared by writing a logic one to the flag.
When the SREG I-bit, TOIE2 (Timer/Counter2 Overflow Interrupt Enable), and TOV2 are set (one), the
Timer/Counter2 Overflow interrupt is executed. In PWM mode, this bit is set when Timer/Counter2 changes count-
ing direction at $00.
18.11.7 SFIOR – Special Function IO Register
Bit
7
6
5
4
3
2
1
0
ADTS2
ADTS1
ADTS0
–
ACME
PUD
PSR2
PSR10
SFIOR
Read/Write
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bit 1 – PSR2: Prescaler Reset Timer/Counter2
When this bit is written to one, the Timer/Counter2 prescaler will be reset. The bit will be cleared by hardware after
the operation is performed. Writing a zero to this bit will have no effect. This bit will always be read as zero if
Timer/Counter2 is clocked by the internal CPU clock. If this bit is written when Timer/Counter2 is operating in asyn-
chronous mode, the bit will remain one until the prescaler has been reset.
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
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