ATMEGA32A_14 Datasheet, PDF (122/336 Pages) ATMEL Corporation – 8-bit Microcontroller with 32KBytes In-System Programmable Flash

save or Extended Standby mode is sufficient, the following algorithm can be used to ensure that one TOSC1
cycle has elapsed:
1. Write a value to TCCR2, TCNT2, or OCR2.
2. Wait until the corresponding Update Busy Flag in ASSR returns to zero.
3. Enter Power-save or Extended Standby mode.
• When the asynchronous operation is selected, the 32.768kHz Oscillator for Timer/Counter2 is always running,
except in Power-down and Standby modes. After a Power-up Reset or wake-up from Power-down or Standby
mode, the user should be aware of the fact that this Oscillator might take as long as one second to stabilize. The
user is advised to wait for at least one second before using Timer/Counter2 after power-up or wake-up from
Power-down or Standby mode. The contents of all Timer/Counter2 Registers must be considered lost after a
wake-up from Power-down or Standby mode due to unstable clock signal upon start-up, no matter whether the
Oscillator is in use or a clock signal is applied to the TOSC1 pin.
• Description of wake up from Power-save or Extended Standby mode when the timer is clocked asynchronously:
When the interrupt condition is met, the wake up process is started on the following cycle of the timer clock, that
is, the timer is always advanced by at least one before the processor can read the counter value. After wake-up,
the MCU is halted for four cycles, it executes the interrupt routine, and resumes execution from the instruction
following SLEEP.
• Reading of the TCNT2 Register shortly after wake-up from Power-save may give an incorrect result. Since
TCNT2 is clocked on the asynchronous TOSC clock, reading TCNT2 must be done through a register
synchronized to the internal I/O clock domain. Synchronization takes place for every rising TOSC1 edge. When
waking up from Power-save mode, and the I/O clock (clk_I/O) again becomes active, TCNT2 will read as the
previous value (before entering sleep) until the next rising TOSC1 edge. The phase of the TOSC clock after
waking up from Power-save mode is essentially unpredictable, as it depends on the wake-up time. The
recommended procedure for reading TCNT2 is thus as follows:
1. Write any value to either of the registers OCR2 or TCCR2.
2. Wait for the corresponding Update Busy Flag to be cleared.
3. Read TCNT2.
• During asynchronous operation, the synchronization of the Interrupt Flags for the asynchronous timer takes
three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the
processor can read the timer value causing the setting of the Interrupt Flag. The output compare pin is changed
on the timer clock and is not synchronized to the processor clock.
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
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