AT83C51SND1C_03 Datasheet, PDF (122/210 Pages) ATMEL Corporation – Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface

This time-out may be disarmed after receiving 8 data (F1FI flag set) or after receiving
end of frame (EOFI flag set) in case of block length less than 8 data (1, 2 or 4).
Data Reading
Data is read from the FIFO by reading to MMDAT register. Each time one FIFO
becomes full (F1FI or F2FI set), user is requested to flush this FIFO by reading 8 data.
Figure 87. Data Stream Reception Flows
Data Stream
Reception
Data Stream
Initialization
Data Stream
Reception ISR
FIFO Full?
F1FI or F2FI = 1?
Unmask FIFOs Full
F1FM = 0
F2FM = 0
FIFO Full?
F1FI or F2FI = 1?
FIFO Reading
read 8 data from MMDAT
No More Data
To Receive?
FIFO Reading
read 8 data from MMDAT
No More Data
To Receive?
Send
STOP Command
a. Polling mode
Mask FIFOs Full
F1FM = 1
F2FM = 1
Send
STOP Command
b. Interrupt mode
122 AT8xC51SND1C
4109E–8051–06/03