ATA8742_14 Datasheet, PDF (115/215 Pages) ATMEL Corporation – Microcontroller with UHF ASK/FSK Transmitter

Table 21-4 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase correct or the phase and
frequency correct, PWM mode.
Table 21-4. Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM⁽¹⁾
COM1A1/COM1B1
COM1A0/COM1B0 Description
0
0
Normal port operation, OC1A/OC1B disconnected.
WGM13=0: Normal port operation, OC1A/OC1B disconnected.
0
1
WGM13=1: Toggle OC1A on compare match, OC1B reserved.
1
0
Clear OC1A/OC1B on compare match when up-counting. Set
OC1A/OC1B on compare match when downcounting.
1
1
Set OC1A/OC1B on compare match when up-counting. Clear
OC1A/OC1B on compare match when downcounting.
Notes: 1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
Section 21.9.4 “Phase Correct PWM Mode” on page 108 for more details.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B register, these bits control the counting sequence of the counter, the
source for maximum (TOP) counter value, and what type of waveform generation to be used, see Table 21-5 on page 115.
Modes of operation supported by the Timer/Counter unit are: normal mode (counter), clear timer on compare match (CTC)
mode, and three types of pulse width modulation (PWM) modes. (Section 21.9 “Modes of Operation” on page 105).
Table 21-5. Waveform Generation Mode Bit Description⁽¹⁾
Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Notes:
WGM12 WGM11 WGM10 Timer/Counter Mode of
WGM13 (CTC1) (PWM11) (PWM10) Operation
TOP
Update of TOV1 Flag
OCR1x at Set on
0
0
0
0
Normal
0xFFFF Immediate MAX
0
0
0
1
PWM, phase correct, 8-bit 0x00FF TOP
BOTTOM
0
0
1
0
PWM, phase correct, 9-bit 0x01FF TOP
BOTTOM
0
0
1
1
PWM, phase correct, 10-bit 0x03FF TOP
BOTTOM
0
1
0
0
CTC
OCR1A Immediate MAX
0
1
0
1
Fast PWM, 8-bit
0x00FF BOTTOM TOP
0
1
1
0
Fast PWM, 9-bit
0x01FF BOTTOM TOP
0
1
1
1
Fast PWM, 10-bit
0x03FF BOTTOM TOP
1
0
0
0
PWM, phase and frequency
Correct
ICR1
BOTTOM BOTTOM
1
0
0
1
PWM, phase and frequency
Correct
OCR1A
BOTTOM BOTTOM
1
0
1
0
PWM, phase correct
ICR1
TOP
BOTTOM
1
0
1
1
PWM, phase correct
OCR1A TOP
BOTTOM
1
1
0
0
CTC
ICR1
Immediate MAX
1
1
0
1
(Reserved)
–
–
–
1
1
1
0
Fast PWM
ICR1
BOTTOM TOP
1
1
1
1
Fast PWM
OCR1A BOTTOM TOP
1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the WGM12:0 definitions. However, the func-
tionality and location of these bits are compatible with previous versions of the timer.
ATA8742 [DATASHEET] 115
9151C–INDCO–09/14