AT89C5131A-L_14 Datasheet, PDF (115/186 Pages) ATMEL Corporation – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode

4338F–USB–08/07
AT89C5131A-L
Bit
Number
1
0
Bit
Mnemonic Description
SD1 Address bit 1 or Data bit 1.
SD0 Address bit 0 (R/W) or Data bit 0.
Table 88. SSCS (094h) Read - Synchronous Serial Control and Status Register
7
6
5
4
3
2
1
0
SC4
SC3
SC2
SC1
SC0
0
0
0
Bit
Number
0
1
2
3
4
5
6
7
Bit
Mnemonic Description
0
Always zero
0
Always zero
0
Always zero
SC0
Status Code bit 0
See Table 81 to Table 85
Status Code bit 1
SC1
See Table 81 to Table 85
SC2
Status Code bit 2
See Table 81 to Table 85
SC3
Status Code bit 3
See Table 81 to Table 85
SC4
Status Code bit 4
See Table 81 to Table 85
Table 89. SSADR (096h) - Synchronous Serial Address Register (read/write)
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Bit
Number
7
6
5
4
3
2
1
0
Bit
Mnemonic Description
A7
Slave address bit 7.
A6
Slave address bit 6.
A5
Slave address bit 5.
A4
Slave address bit 4.
A3
Slave address bit 3.
A2
Slave address bit 2.
A1
Slave address bit 1.
General call bit
GC Clear to disable the general call address recognition.
Set to enable the general call address recognition.
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