ATMEGA8535L_14 Datasheet, PDF (112/321 Pages) ATMEL Corporation – Nonvolatile Program and Data Memories

Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used, see Table 48. Modes of operation
supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on
Compare Match (CTC) mode, and three types of Pulse Width Modulation (PWM)
modes. See “Modes of Operation” on page 101.
Table 48. Waveform Generation Mode Bit Description⁽¹⁾
WGM12 WGM11 WGM10 Timer/Counter Mode of
Mode WGM13 (CTC1) (PWM11) (PWM10) Operation
TOP
Update of TOV1 Flag
OCR1x at Set on
0
0
0
0
0
Normal
0xFFFF Immediate MAX
1
0
0
0
1
PWM, Phase Correct, 8-bit
0x00FF TOP
BOTTOM
2
0
0
1
0
PWM, Phase Correct, 9-bit
0x01FF TOP
BOTTOM
3
0
0
1
1
PWM, Phase Correct, 10-bit
0x03FF TOP
BOTTOM
4
0
1
0
0
CTC
OCR1A Immediate MAX
5
0
1
0
1
Fast PWM, 8-bit
0x00FF BOTTOM TOP
6
0
1
1
0
Fast PWM, 9-bit
0x01FF BOTTOM TOP
7
0
1
1
1
Fast PWM, 10-bit
0x03FF BOTTOM TOP
8
1
0
0
0
PWM, Phase and Frequency
Correct
ICR1
BOTTOM BOTTOM
9
1
0
0
1
PWM, Phase and Frequency
Correct
OCR1A BOTTOM BOTTOM
10
1
0
1
0
PWM, Phase Correct
ICR1
TOP
BOTTOM
11
1
0
1
1
PWM, Phase Correct
OCR1A TOP
BOTTOM
12
1
1
0
0
CTC
ICR1
Immediate MAX
13
1
1
0
1
Reserved
–
–
–
14
1
1
1
0
Fast PWM
ICR1
BOTTOM TOP
15
1
1
1
1
Fast PWM
OCR1A BOTTOM TOP
Note: 1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the WGM12:0 definitions. However, the functionality and
location of these bits are compatible with previous versions of the timer.
112 ATmega8535(L)
2502K–AVR–10/06