AT89C5130A-M_14 Datasheet, PDF (109/188 Pages) ATMEL Corporation – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode

Figure 20-4. Format and State in the Master Transmitter Mode
MT
AT89C5130A/31A-M
Successfull
transmission
S
SLA
W
A
to a slave
receiver
08h
18h
Next transfer
started with a
repeated start
condition
Data
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
A
P
20h
Arbitration lost in slave
address or data byte
A or A
Other master
continues
A
P
28h
S
SLA
W
10h
R
MR
A
P
30h
A or A
Other master
continues
Arbitration lost and
addressed as slave
38h
A
Other master
continues
38h
From master to slave
From slave to master
68h 78h B0h
To corresponding
states in slave mode
Data
n
A
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
4337K–USB–04/08
109