AT86RF230_14 Datasheet, PDF (10/98 Pages) ATMEL Corporation – Registers and Frame Buffer Accessible through Fast SPI

6 Microcontroller Interface
This section describes the AT86RF230 to microcontroller interface. The interface
comprises a slave SPI and additional control signals, see Figure 6-1. The SPI timing
and protocol are described.
Figure 6-1. Microcontroller to AT86RF230 Interface
Microcontroller
Master
SEL
MOSI
MISO
SCLK
GPIO1/CLK
GPIO2/IRQ
GPIO3
GPIO4
SEL
MOSI
MISO
SCLK
CLKM
IRQ
SLP_TR
RST
AT86RF230
Slave
SEL
MOSI
MISO
SCLK
CLKM
IRQ
SLP_TR
RST
Microcontrollers with a master SPI, such as Atmel’s AVR family, interface directly to the
AT86RF230. The SPI is used for Frame Buffer and register access. The additional
control signals are connected to the GPIO/IRQ interface of the microcontroller. Table
6-1 introduces the radio transceiver I/O signals and their functionality.
Table 6-1. Signal Description of Microcontroller Interface
Signal
Description
SEL
MOSI
MISO
SCLK
CLKM
IRQ
SLP_TR
RST
SPI select signal, active low
SPI data (master output slave input) signal
SPI data (master input slave output) signal
SPI clock signal
AT86RF230 clock output, usable as:
- Microcontroller clock source
- High precision timing reference
AT86RF230 interrupt request signal
AT86RF230 multi purpose control signal (functionality is state-depended):
- Sleep/Wakeup
- TX start
- Controls CLKM output
AT86RF230 reset signal, active low
10 _AT86RF230
5131E-MCU Wireless-02/09