AT80C5112 Datasheet, PDF (10/97 Pages) ATMEL Corporation – 8-bit Microcontroller with A/D Converter

Power Down Modes
Prescaler Divider
• Exit from IDLE modes will leave the oscillator control bits OSCAEN, OSCBEN and
CKS unchanged.
• POWER DOWN modes are achieved by using any instruction that writes into
PCON.1 sfr
• Exit from POWER DOWN mode is achieved either by a hardware Reset, or by an
external interruption.
• By RST signal: The CPU will restart on OSCA.
• By INT0 or INT1 interruptions, if enabled. The oscillators control bits OSCAEN,
OSCBEN and CKS will not be changed, so the selected oscillator before entering
into Power-down will be activated.
Table 3. Power Modes
PD IDLE CKS OSCBEN OSCAEN Selected Mode Comment
0
0
1
X
1 NORMAL MODE A OSCA: XTAL clock
X
X
1
X
0 INVALID
no active clock
0
0
0
1
X NORMAL MODE B OSCB: high speed RC clock
X
X
0
0
X INVALID
0
1
1
X
1 IDLE MODE A
The CPU is off, OSCA supplies the
peripherics
0
1
0
1
X IDLE MODE B
The CPU is off, OSCB supplies the
peripherics
1
X
X
X
X
TOTAL POWER
DOWN
The CPU is off, OSCA and OSCB are
stopped OSCC is stopped
• An hardware RESET selects the prescaler divider:
• CKRL = FFh: internal clock = OscOut/2 (Standard C51 feature)
• X2 = 0,
• After Reset, any value between FFh down to 00h can be written by software into
CKRL sfr in order to divide frequency of the selected oscillator:
• CKRL = 00h: minimum frequency = OscOut/512
• CKRL = FFh: maximum frequency = OscOut/2
The frequency of the CPU and peripherals clock CkOut is related to the frequency of the
main oscillator OscOut by the following formula:
F_CkOut = F_OscOut/(512 - 2*CKRL)
Some examples can be found in the table below:
F_OscOut
MHz
12
X2
CKRL
0
FF
F_CkOut (Mhz)
6
12
0
FE
3
12
1
x
12
10 AT8xC5112
4191B–8051–04/03