ATR0635_08 Datasheet, PDF (1/35 Pages) ATMEL Corporation – ANTARIS4 Single-chip GPS Receiver SuperSense

Features
• 16-channel GPS Correlator
– 8192 Search Bins with GPS Acquisition Accelerator
– Accuracy: 2.5m CEP (2D, Stand Alone)
– Time to First Fix: 34s (Cold Start)
– Acquisition Sensitivity: –142 dBm (Cold Start, With External LNA)
– Tracking Sensitivity: –158 dBm (With External LNA)
• Utilizes the ARM7TDMI^® ARM^® Thumb^® Processor Core
– High-performance 32-bit RISC Architecture
– EmbeddedICE^™ (In-Circuit Emulation)
• 128 Kbytes Internal RAM
• 384 Kbytes Internal ROM with u-blox GPS Firmware SuperSense^®
• 1.5-bit ADC On-chip
• Single IF Architecture
• 2 External Interrupts
• 24 User-programmable I/O Lines
• 1 USB Device Port
– Universal Serial Bus (USB) 2.0 Full-speed Device
– Embedded USB V2.0 Full-speed Transceiver
• 2 USARTs
• Master/Slave SPI Interface
– 4 External Slave Chip Selects
• Programmable Watchdog Timer
• Advanced Power Management Controller (APMC)
– Geared Master Clock to Reduce Power Consumption
– Sleep State with Disabled Master Clock
– Hibernate State with 32.768 kHz Master Clock
• Real Time Clock (RTC)
• 1.8V to 3.3V User-definable IO Voltage for Several GPIOs with 5V Tolerance
• 4 KBytes of Battery Backup Memory
• 7 mm × 10 mm 96 Pin BGA Package, 0.8 mm Pitch, Pb-free, RoHS-compliant
Benefits
• Fully Integrated Design With Low BOM
• No External Flash Memory Required
• Supports NMEA^®, UBX Binary and RTCM Protocol for DGPS
• Supports SBAS (WAAS, EGNOS, MSAS)
• Up to 4 Hz Update Rate
• Supports A-GPS (Aiding)
• Excellent Noise Performance
ANTARIS4
Single-chip
GPS Receiver
SuperSense
ATR0635
4928H–GPS–06/08