AT52BR1672 Datasheet, PDF (1/39 Pages) ATMEL Corporation – 16-megabit Flash and 2-megabit/ 4-megabit SRAM Stack Memory

Features
• 16-Mbit Flash and 2-Mbit/4-Mbit SRAM
• Single 66-ball 8 mm x 10 mm x 1.2 mm CBGA Package
• 2.7V to 3.3V Operating Voltage
Flash
• 2.7V to 3.3V Read/Write
• Access Time – 85 ns
• Sector Erase Architecture
– Thirty-one 32K Word (64K Byte) Sectors with Individual Write Lockout
– Eight 4K Word (8K Byte) Sectors with Individual Write Lockout
• Fast Word Program Time – 20 µs
• Fast Sector Erase Time – 300 ms
• Dual-plane Organization, Permitting Concurrent Read While Program/Erase
– Memory Plane A: Eight 4K Word and Seven 32K Word Sectors
– Memory Plane B: Twenty-four 32K Word Sectors
• Erase Suspend Capability
– Supports Reading and Programming from Any Sector by Suspending Erase of a
Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
• Low-power Operation
– 30 mA Active
– 10 µA Standby
• Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
• VPP Pin for Accelerated Program/Erase Operations
• RESET Input for Device Initialization
• Sector Lockdown Support
• Top/Bottom Block Configuration
• 128-bit Protection Register
SRAM
• 2-megabit (128K x 16)/4-megabit (256K x 16)
• 2.7V to 3.3V V_CC Operating Voltage
• 70 ns Access Time
• Fully Static Operation and Tri-state Output
• 1.2V (Min) Data Retention
• Industrial Temperature Range
16-megabit
Flash and
2-megabit/
4-megabit
SRAM Stack
Memory
AT52BR1672(T)
AT52BR1674(T)
Preliminary
Device Number
AT52BR1672(T)
AT52BR1674(T)
Flash Plane
Architecture
12M + 4M
12M + 4M
Flash
Configuration
16M (1M x 16)
16M (1M x 16)
SRAM
Configuration
2M (128K x 16)
4M (256K x 16)
Rev. 2604B–STKD–09/02
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