AX88780_07 Datasheet, PDF (30/55 Pages) ASIX Electronics Corporation – High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller

AX88780
4.34 MDCLKPAT--MDC Clock Pattern Register
Offset Address = 0xFCA0
Default = 0x0000_8040
Field
31:16
15:8
7:0
Name Type
-R
- R/W
MDCPAT R/W
Default
All 0’s
0x80
0x40
Description
Reserved
Reserved, must set to 0x80 for normal operation
MDC Clock Divide Factor
This field defines the divide factor of host clock. AX88780 will refer to this field
and generate a low speed clock to PHY.
4.35 RXCHKSUMCNT--RX IP/UDP/TCP Checksum Error Counter
Offset Address = 0xFCA4
Field Name
Type
31:16
-
R
15:0 RXCHKERCNT R/W
Default = 0x0000_0000
Default
Description
All 0’s Reserved
All 0’s RX Checksum Error Counter
If the RXCHKSUM field of RX_CFG register is set to ‘1’, MAC will check the
checksum of IP, TCP or UDP packet. Whenever there is checksum error
detected, this field will be added one. The value will be rounded back to 0x0000
if it exceeds 0xFFFF.
4.36 RXCRCNT--RX CRC Error Counter
Offset Address = 0xFCA8
Default = 0x0000_0000
Field Name
Type
31:16
-
R
15:0 RXCRCCNT R/W
Default
All 0’s
All 0’s
Description
Reserved
RX CRC32 Error Counter
MAC checks the received packet. If there is a CRC error detect, this field will
be added one. The value will be rounded back to 0x0000 if it exceeds 0xFFFF.
4.37 TXFAILCNT--TX Fail Counter
Offset Address = 0xFCAC
Field Name
Type
31:16
-R
15:0 TXFILCNT R/W
Default
All 0’s
All 0’s
Default = 0x0000_0000
Description
Reserved
TX Fail Counter
This field records the number of transmitted error for TX packet. The value will
be rounded back to 0x0000 if it exceeds 0xFFFF.
4.38 PROMDPR--EEPROM Data Port Register
Offset Address = 0xFCB0h
Default = 0x0000_0000
Field Name Type
31:16
-R
15:0 PROMDP R/W
Default
All 0’s
All 0’s
Description
Reserved
EEPROM Data Port
The data to or from EEPROM is set in this field.
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ASIX ELECTRONICS CORPORATION