AX88780_07 Datasheet, PDF (10/55 Pages) ASIX Electronics Corporation – High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller

HD19
IO3, 8mA 124
Data bus bit19, internal pull down. *
HD20
IO3, 8mA 122
Data bus bit20, internal pull down. *
HD21
IO3, 8mA 121
Data bus bit21, internal pull down. *
HD22
IO3, 8mA 120
Data bus bit22, internal pull down. *
HD23
IO3, 8mA 118
Data bus bit23, internal pull down. *
HD24
IO3, 8mA 116
Data bus bit24, internal pull down. *
HD25
IO3, 8mA 114
Data bus bit25, internal pull down. *
HD26
IO3, 8mA 113
Data bus bit26, internal pull down. *
HD27
IO3, 8mA 112
Data bus bit27, internal pull down. *
HD28
IO3, 8mA 111
Data bus bit28, internal pull down. *
HD29
IO3, 8mA 110
Data bus bit29, internal pull down. *
HD30
IO3, 8mA 109
Data bus bit30, internal pull down. *
HD31
IO3, 8mA 108
Data bus bit31, internal pull down. *
HA1
I3
42
Address bus bit1.
HA2
I3
41
Address bus bit2.
HA3
I3
34
Address bus bit3.
HA4
I3
33
Address bus bit4.
HA5
I3
32
Address bus bit5.
HA6
I3
31
Address bus bit6.
HA7
I3
30
Address bus bit7.
HA8
I3
29
Address bus bit8.
HA9
I3
28
Address bus bit9.
HA10
I3
26
Address bus bit10.
HA11
I3
25
Address bus bit11.
HA12
I3
24
Address bus bit12.
HA13
I3
23
Address bus bit13.
HA14
I3
22
Address bus bit14.
HA15
I3
21
Address bus bit15.
WEN
I3
44
Data Write Enable
Host drives WEN and it is active low.
CSN
I3
45
Chip Select Enable
Host drives CSN and it is active low.
OEN
I3
43
Data Output Enable
Host drives OEN and it is active low.
*Note: The internal Pull-down of HD16 to HD31 will be disabled in 32-bit mode.
AX88780
2.3 EEPROM Interface
Table 2: EEPROM Interface signals group
Pin Name Type
EECLK O3, 12mA
EECS
O3, 12mA
EEDI
O3, 12mA
EEDO
I3, PD
Pin NO
47
48
49
50
Pin Description
A low speed clock to EEPROM
Chip select to EEPROM device. This pin will be treated as full-duplex indicator
when bit10 of PHY_CTRL register is set to high. It is active high in full-duplex
mode, and low in half-duplex mode.
Data to EEPROM, valid in EECS is high and EECLK in rising edge.
This pin will be treated as collision indicator when bit10 of PHY_CTRL register is
set to high. It is active high in collision indicator.
Data from EEPROM
10
ASIX ELECTRONICS CORPORATION