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ALUC2380B1 Datasheet, PDF (3/3 Pages) Advanced Semiconductor Business Inc. – Internally Matched Balanced LNA Module Including Coupler
plerowTM ALUC2380B1
Internally Matched Balanced LNA Module
Including Coupler
Application Circuit
VS
Tantal or MLC (Multi Layer Ceramic)
Capacitor
+-
C1
IN
ALUC
C2
OUT
Tantal or MLC (Multi Layer Ceramic)
Capacitor
+-
VS
1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced
from the DC supply. The capacitance value may be determined by customer’s DC supply status. The ca-
pacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for
the best electrical performance.
2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the
RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are includ-
ed inside the ALN module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just
in case that the customer wants. The value of C1 & C2 is determined by considering the application fre-
quency.
Recommended Soldering Reflow Process
260 C
Ramp-up
(3 ˚C/sec)
200 C
20~40 sec
Ramp-down
(6 C/sec)
Evaluation Board Layout
Vs
IN
OUT
150 C
60~180 sec
Vs
Size 40x40 mm
(for ALUC Series – 22x12 mm)
3/3
(Top View)
www.asb.co.kr
January 2010