AP8942A_15 Datasheet, PDF (4/19 Pages) Aplus Intergrated Circuits – APLUS INTEGRATED CIRCUITS INC

Integrated Circuits Inc.
PIN DESCRIPTIONS
aP8942A
S1 ~ S8
Input Trigger Pins:
- S1 to S8 are used to trigger the 32 Voice Groups in Key Mode.
- S1 to S5 together with SBT are used to trigger the 32 Voice Groups in CPU Parallel Mode.
- In OTP Programming Mode, S1 to S7 are used as program enable pins.
SBT
Input Trigger Pin:
- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one
sequentially.
- In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to
S5 and starts the voice playback.
- In OTP Programming Mode, this pin is used as PGM signal.
VDD and V33
Power Supply Pin for normal and programming operation
VSS
Power Ground Pin
VOUT1 and VOUT2
Digital PWM output pins which can drive speaker and buzzer directly for voice playback.
OSC
During voice playback, an external resistor is connected between this pin and the VDD pin to set
the sampling frequency. In OTP Programming Mode, this is the ACLK input signal.
VPP
No connection during voice playback. In OTP Programming Mode, this pin is connected to a
separate 6.5V power supply.
OUT1 and OUT2
- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins
for the STOP pulse, BUSY and LED signals.
- During OTP programming, OUT1 serves as OEB while OUT2 serves as data IO.
COUT
Analog 8-bit current mode D/A output for voice playback
RST
Chip reset in playback mode or DCLK pin in OTP programming mode.
Ver 5.0
4
OCT 01, 2012