AP8910A1_15 Datasheet, PDF (15/18 Pages) Aplus Intergrated Circuits – Integrated Circuits Inc

Integrated Circuits Inc. aP8921A/10A
Symbol Parameter
Min. Typ. Max.
Unit
tKD
Key trigger debounce time
16


ms
tKD
Key trigger debounce time – retrigger
24


ms
tUP
Ramp up time
0 128/Fs −−
s
tDN
Ramp down time
0
−− 256/Fs
s
tKDD _{Key trigger delay after ramp down −−}
0
−−
ms
tSTPD
STOP pulse output delay time

 256
µs
tSTPW
STOP pulse width

64

ms
tBD
BUSY signal output delay time

 100
ns
tBH
BUSY signal output hold time
 100 
ns
tASH
Address set-up / hold time
100


ns
tSBTW _{SBT stroke pulse width}
65


µs
tLEDC
LED flash frequency

3

Hz
Note
1
1
3
3
1
1
2
Notes : 1. This parameter is inversely proportional to the sampling frequency.
2. This parameter is proportional to the sampling frequency.
3. Fs is sampling frequency in Hz
Ver 5.0
15
Aug 23, 2011