CS1630 Datasheet, PDF (33/56 Pages) Cirrus Logic – 2-Channel TRIAC Dimmable LED Driver IC

CS1630/31
6.9 Configuration 4 (Config4) – Address 36
7
6
5
4
3
2
T2CH1GAIN5 T2CH1GAIN4 T2CH1GAIN3 T2CH1GAIN2 T2CH1GAIN1 T2CH1GAIN0
1
SYNC
0
POL_ZCD
Number
Name
Description
[ 7:2 ]
Sets T2 compensation gain T2_CH1CompGain for channel 1, which is required
when T2 measurement compensation is enabled for flyback designs. The
value is an unsigned integer in the range of 0T2CH1GAIN[5:0]<63. Com-
pensated T2 time T2_Compensated used in the second stage charge regulation
loop is given by:
T2CH1GAIN[5:0]
T2_Compensated = T2_Measured – T_{ZCDRi sin gEdge}  T2_CH1CompGain
where,
T2_CH1CompGain is a decimal number in the range of 0.0T2_CH1CompGain<4.0:
T2_CH1CompGain = T2CH1GAIN[5:0]  0.0625
Enables the digital synchronization signal that indicates which channel the
controller is signaling for each gate switching period on the IC’s SYNC pin.
[ 1]
SYNC
The SYNC bit should be enabled for non-isolated second stage designs
where the synchronizer circuit is directly driven from the IC's SYNC pin.
0 = Disables SYNC onto pin
1 = Enables SYNC onto pin
Sets polarity of zero-current detection comparator output. Recommended to
[0]
POL_ZCD
set bit POL_ZCD to active-low polarity.
0 = Active-low polarity
1 = Positive polarity
6.10 Second Stage Dim (S2DIM) – Address 37
7
6
5
4
3
2
1
0
2⁷
2⁶
2⁵
2⁴
2³
2²
2¹
2⁰
S2DIM sets the minimum dim for second stage (flyback, buck, or tapped buck). The register value is an un-
signed integer in the range of 0value255. Enforced minimum dim percentage dim_min is determined by the
following equation:
dim_min
=


S_-----2_----D_----I_--M_------[_-47---0-:_-0_--9--]_-5--_---1_---6_-----+-----1_---5_{--}
 100
6.11 Maximum TT (TTMAX) – Address 38
7
6
5
4
3
2
1
0
2⁷
2⁶
2⁵
2⁴
2³
2²
2¹
2⁰
TTMAX sets the maximum allowable target period for the second stage TT. The register value is an unsigned
integer in the range of 0value255. The maximum TT period is determined by:
TTMAX[7:0]  128 + 127  50ns
The maximum period for TT can be configured from 6.35s to 1.63835ms.
DS954F2
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