AAT4650_06 Datasheet, PDF(9/14 Page) Advanced Analogic Technologies

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AAT4650_06 Datasheet, PDF (9/14 Pages) Advanced Analogic Technologies – 5V/3V PC Card Power Switch

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Thermal issues are not a problem in the SOP-8

package since ÎJA, the package thermal resistance,

is only 120Â°C/W. At any given ambient temperature

(TA) the maximum package power dissipation can

be determined by the following equation:

PD(MAX) =

TJ(MAX) -TA

Î¸JA

Constants for the AAT4650 are maximum junction

temperature, TJ(MAX) = 125Â°C, and package thermal

resistance, ÎJA = 120Â°C/W. Worst case conditions

are calculated at the maximum operating tempera-

ture where TA = 85Â°C. Typical conditions are cal-

culated under normal ambient conditions where TA

= 25Â°C. At TA = 85Â°C, PD(MAX) = 333mW. At TA =

25Â°C, PD(MAX) = 833mW.

Maximum current is given by the following equation:

IOUT(MAX) =

PD(MAX)

RDS(ON)

For the AAT4650 at 85Â°C, IOUT(MAX) = 1.65A, a

value greater than the internal minimum current

limit specification.

Over-Current and Over-Temperature

Protection

Because many AAT4650 applications provide power

to external devices, it is designed to protect its host

device from malfunctions in those peripherals

through slew rate control, current limiting, and ther-

mal limiting. The AAT4650 current limit and thermal

limit serve as an immediate and reliable electronic

fuse without any increase in RDS(ON) for this function.

Other solutions, such as a poly fuse, do not protect

the host power supply and system from mishandling

or short circuiting peripherals; they will only prevent

a fire. The AAT4650 high-speed current limit and

thermal limit not only prevent fires, they also isolate

the power supply and entire system from any activi-

ty at the external port and report a mishap by means

of a FAULT signal.

Over-current and over-temperature go hand in hand.

Once an over-current condition exists, the current

supplied to the load by the AAT4650 is limited to the

4650.2006.05.1.2

AAT4650

5V/3V PC Card Power Switch

over-current threshold. This results in a voltage drop

across the AAT4650 which causes excess power

dissipation and a package temperature increase. As

the die begins to heat up, the over-temperature cir-

cuit is activated. If the temperature reaches the max-

imum level, the AAT4650 automatically switches off

the P-channel MOSFETs. While they are off, the

over-temperature circuit remains active. Once the

temperature has cooled by approximately 10Â°C, the

P-channel MOSFETs are switched back on. In this

manner, the AAT4650 is thermally cycled on and off

until the short circuit is removed. Once the short is

removed, normal operation automatically resumes.

To save power, the full high-speed over-current cir-

cuit is not activated until a lower threshold of cur-

rent (approximately 500mA) is exceeded in the

power device. When the load current exceeds this

crude threshold, the AAT4650 quiescent current

increases from 15ÂµA to 200ÂµA. The high-speed

over-current circuit works by linearly limiting the

current when the current limit is reached. As the

voltage begins to drop on VCC due to current limit-

ing, the current limit magnitude varies and general-

ly decreases as the VCC voltage drops to 0V.

Switching VCC Voltage

The AAT4650 meets PC card standards for switch-

ing the VCC output by providing a ground path for

VCC, as well as a high impedance state. The PC

card protocol for determining low voltage opera-

tions is to first power the peripheral with 5V and poll

for 3.3V operation. When transitioning from 5V to

3.3V, VCC must be discharged to less than 0.8V to

provide a hard reset. The resistive ground state

(CTL1 = 0, CTL0 = 0) will accommodate this. The

ground state will also guarantee the VCC voltage to

be discharged within the specified amount of time

(100ms).

Printed Circuit Board Layout

Recommendations

For proper thermal management, to minimize PCB

trace resistance, and to take advantage of the low

RDS(ON) of the AAT4650, a few circuit board layout

rules should be followed: VCC3, VCC5, and VCC should

be routed using wider than normal traces; the two

VCC pins (Pins 6 and 7) should be connected to the

same wide PCB trace; and GND should be connect-

ed to a ground plane. For best performance, CIN and

COUT should be placed close to the package pins.

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