AAT2552 Datasheet, PDF (23/33 Pages) Advanced Analogic Technologies – Total Power Solution for Portable Applications

AAT2552
Total Power Solution for Portable Applications
Linear Regulator Output Capacitor (C5)
For proper load voltage regulation and operational
stability, a capacitor is required between OUT and
GND. The C_OUT capacitor connection to the LDO
regulator ground pin should be made as directly as
practically possible for maximum device perform-
ance. Since the regulator has been designed to
function with very low ESR capacitors, ceramic
capacitors in the 1.0µF to 10µF range are recom-
mended for best performance. Applications utilizing
the exceptionally low output noise and optimum
power supply ripple rejection should use 2.2µF or
greater for C_OUT. In low output current applications,
where output load is less than 10mA, the minimum
value for C_OUT can be as low as 0.47µF.
Battery Charger Output Capacitor (C2)
The battery charger of the AAT2552 only requires a
1µF ceramic capacitor on the BAT pin to maintain
circuit stability. This value should be increased to
10µF or more if the battery connection is made any
distance from the charger output. If the AAT2552 is
to be used in applications where the battery can be
removed from the charger, such as with desktop
charging cradles, an output capacitor greater than
10µF may be required to prevent the device from
cycling on and off when no battery is present.
Step-Down Converter Output Capacitor (C3)
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7µF to 10µF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple. For enhanced transient response and
low temperature operation applications, a 10µF
(X5R, X7R) ceramic capacitor is recommended to
stabilize extreme pulsed load conditions.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent, the ceramic output capacitor alone supplies
the load current until the loop responds. Within two
or three switching cycles, the loop responds and
the inductor current increases to match the load
current demand. The relationship of the output volt-
age droop during the three switching cycles to the
output capacitance can be estimated by:
C_OUT
=
3 · ΔI_LOAD
V_DROOP · F_S
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation also limits
the minimum output capacitor value to 4.7µF. This
is due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
The maximum output capacitor RMS ripple current
is given by:
I = _RMS(MAX)
1
2·
·
3
V_OUT · (V_IN(MAX) - V_OUT)
L · F_S · V_IN(MAX)
Dissipation due to the RMS current in the ceram-
ic output capacitor ESR is typically minimal,
resulting in less than a few degrees rise in hot-
spot temperature.
Inductor Selection
The step-down converter uses peak current mode
control with slope compensation to maintain stabil-
ity for duty cycles greater than 50%. The output
inductor value must be selected so the inductor
current down slope meets the internal slope com-
pensation requirements. The internal slope com-
pensation for the AAT2552 is 0.45A/µsec. This
equates to a slope compensation that is 75% of the
inductor current down slope for a 1.8V output and
3.0µH inductor.
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