AAT1149 Datasheet, PDF (12/20 Pages) Advanced Analogic Technologies – 3MHz Fast Transient 400mA Step-Down Converter

AAT1149
3MHz Fast Transient
400mA Step-Down Converter
Configuration
0.6V Adjustable With
External Feedback
Output Voltage
1V, 1.2V
1.5V, 1.8V
2.5V
3.3V
Table 1: Inductor Values.
Typical Inductor Value
1.0μH to 1.2μH
1.5μH to 1.8μH
2.2μH to 2.7μH
3.3μH
Always examine the ceramic capacitor DC voltage
coefficient characteristics when selecting the prop-
er value. For example, the capacitance of a 10μF,
6.3V, X5R ceramic capacitor with 5.0V DC applied
is actually about 6μF.
The maximum input capacitor RMS current is:
I_RMS = I_O ·
V_{O ·} ⎛_{1 -} V_O ⎞
V_IN ⎝ V_IN ⎠
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
V_O
V_IN
· ^⎛⎝1 -
V_O ⎞
V_IN ⎠
=
D · (1 - D) =
0.5² = ¹
2
for V_IN = 2 · V_O
I = _RMS(MAX)
I_O
2
The term
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when V_O is twice V_IN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1149. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed
as closely as possible to the IC. This keeps the
12
high frequency content of the input current local-
ized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C2)
can be seen in the evaluation board layout in
Figure 1.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain meas-
urements can also result.
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic should be placed
in parallel with the low ESR, ESL bypass ceramic.
This dampens the high Q network and stabilizes
the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7μF to 10μF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
1149.2006.11.1.0