AAT2514 Datasheet, PDF (11/16 Pages) Advanced Analogic Technologies – Dual Channel 600mA Step-Down Converter

AAT2514
Dual Channel 600mA Step-Down Converter
V_REF
V_FB
Error Amp
When below 50% duty cycle, the slope compensa-
tion is 0.284A/µs; but when above 50% duty cycle,
the slope compensation is set to 1.136A/µs. The
output inductor value must be selected so the
inductor current down slope meets the internal
slope compensation requirements.
Below 50% duty cycle, the slope compensation
requirement is:
m = ^1.25 = 0.284A/µs
2·L
Therefore:
L = ^0.625 = 2.2µH
m
Above 50% duty cycle,
m = ⁵ = 1.136A/µs
2·L
Therefore:
L = ^2.5 = 2.2µH
m
With these adaptive settings, a 2.2µH inductor can
be used for all output voltages from 0.6V to 5V.
Input Capacitor Selection
The input capacitor reduces the surge current drawn
from the input and switching noise from the device.
The input capacitor impedance at the switching fre-
quency shall be less than the input source imped-
ance to prevent high frequency switching current
passing to the input. The calculated value varies
with input voltage and is a maximum when V_IN is
double the output voltage.
2514.2007.06.1.0
V_{O ·} _{1 -} V_O 
V_IN  V_IN 
C_IN =
 V_PP
 I_O
-
ESR^

·
F_S
V_O
V_IN
·
_{1 -}

V_O 
V_IN 
=
1
4
for
V_IN
=
2
·
V_O
1
C_IN(MIN) = _{ VPP}
 I_O
-
ESR^

·
4
·
F_S
A low ESR input capacitor sized for maximum RMS
current must be used. Ceramic capacitors with X5R
or X7R dielectrics are highly recommended because
of their low ESR and small temperature coefficients.
A 22µF ceramic capacitor for most applications is
sufficient. A large value may be used for improved
input voltage filtering.
The maximum input capacitor RMS current is:
I_RMS = I_O ·
V_{O ·} _{1 -} V_O 
V_IN  V_IN 
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current
V_{O ·} _{1 -} V_O  _{= D · (1 - D) = 0.52 =} 1
V_IN  V_IN 
2
I = _RMS(MAX)
I_O
2
To minimize stray inductance, the capacitor should
be placed as closely as possible to the IC. This
keeps the high frequency content of the input current
localized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C1) can
be seen in the evaluation board layout in Figure 3. A
laboratory test set-up typically consists of two long
wires running from the bench power supply to the
evaluation board input voltage pins. The inductance
of these wires, along with the low-ESR ceramic input
capacitor, can create a high Q net-work that may
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