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AWT6321 Datasheet, PDF (1/8 Pages) ANADIGICS, Inc – HELP2TM Dual-band Cellular/PCS CDMA 3.4 V Linear Power Amplifier Module
FEATURES
• InGaP HBT Technology
• High Efficiency:
19 % @ +16 dBm
39 % @ +28 dBm
• Low Quiescent Current: 15 mA
• Internal Voltage Regulation
• Common VMODE Control Line
• Simplified VCC Bus PCB routing
• Reduced External Component Count
• Low Profile Surface Mount Package: 1 mm
• RoHS Compliant Package, 250 oC MSL-3
• Suitable for BC10 (806-824 MHz) band
applications
APPLICATIONS
• CDMA/EVDO & Cell & PCS Dual-band Wireless
Handsets and Data Devices
PRODUCT DESCRIPTION
The AWT6321 addresses the demand for increased
integration in dual-band handsets for North American
CDMA network deployments. The small footprint 3
mm x 5 mm x 1 mm surface mount RoHS compliant
package contains independent RF PA paths to ensure
optimal performance in both frequency bands, while
achieving a 25% PCB space savings compared with
solutions requiring two single-band PAs. The package
pinout was chosen to enable handset manufacturers
to easily route VCC to both power amplifiers and
simplify control with a common VMODE pin. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. The AWT6321
is part of ANADIGICS’ High-Efficiency-at-Low-Power
(HELP™) family of CDMA power amplifiers, which
deliver low quiescent currents and significantly
greater efficiency without a costly external DAC or
DC-DC converter. Through selectable bias modes, the
AWT6321 achieves optimal efficiency across different
output power levels, specifically at low- and mid-
range power levels where the PA typically operates,
thereby dramatically increasing handset talk-time and
standby-time. Its built-in voltage regulator eliminates
the need for external switches. The 3 mm x 5 mm x
AWT6321
HELP2TM Dual-band Cellular/PCS CDMA
3.4 V Linear Power Amplifier Module
Data Sheet - Rev 2.2
M28 Package
14 Pin 3 mm x 5 mm x 1 mm
Surface Mount Module
1 mm surface mount package incorporates matching
networks optimized for output power, efficiency and
linearity in a 50 Ω system.
Figure 1: Block Diagram
10/2008