AS3661 Datasheet, PDF (19/87 Pages) ams AG – Programmable 9-channel LED Dr iver

AS3661
Datasheet - Detailed Description
8.6.3 Controlling the Charge Pump
The charge pump is controlled with two CP_MODE bits in MISC register (address 36H). When both of the bits are low,
the charge pump is disabled and the output voltage is pulled down with an internal 300 kΩ (typ.) resistor. The charge
pump can be forced to bypass mode, so that the battery voltage is connected directly to the current sources. In 1.5x
mode the output voltage is boosted to 4.5V. In automatic mode the charge pump operation mode is determined by
saturation of constant current drivers, like described in chapter LED Forward Voltage Monitoring.
8.6.4 LED Forward Voltage Monitoring
When the charge pump automatic mode selection is enabled, the voltages over the LED drivers LED1 to LED6 are
monitored.
lid ^{Note: Power input for current source outputs LED7, LED8 and LED9 are internally connected to the VBAT pin.}
If the LED1 to LED6 drivers do not have enough headroom, the charge pump gain is set to 1.5x. Driver saturation
a _{monitor does not have a fixed voltage limit, since saturation voltage is a function of temperature and current. The}
charge pump gain is set to 1x, when the battery voltage is high enough to supply all LEDs. In automatic gain change
v _{mode, the charge pump is switched to bypass mode (1x), when LEDs are inactive for over 50 ms.}
ill ^{8.6.5 Gain Change Hysteresis}
The charge pump gain control utilizes digital filtering to prevent supply voltage disturbances (for example, the transient
voltage on the power supply during the GSM burst) from triggering unnecessary gain changes. Hysteresis is provided
t _{to prevent periodic gain changes, which would occur due to LED driver and charge pump voltage drop in 1x mode. The}
hysteresis of the gain change is user configurable, default setting is factory programmable. Flexible configuration
G _{s ensures, that the hysteresis can be minimized or set to desired level in each application. LED forward voltage}
monitoring and gain control block diagram is shown in Figure 21.
A ^t _{Figure 21. Forward Voltage Monitoring and Gain Control Block}
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