TCS3490 Datasheet, PDF (14/34 Pages) ams AG – Color Light-to-Digital Converter

Figure 19:
Enable Register
7
6
Reserved
SAI
5
Reserved
TCS3490 − Register Description
Enable Register (ENABLE 0 x 80)
The Enable Register is used primarily to power the device
ON/OFF, and enable functions and interrupts.
4
AIEN
3
2
1
0
WEN
Reserved AEN
PON
Field
Reserved
SAI
Reserved
AIEN
WEN
Reserved
AEN
PON
Bits
7
6
5
4
3
2
1
0
Description
Reserved. Write as 0.
Sleep After Interrupt. When asserted, the device will power down at the end
of a RGBC cycle if an interrupt is generated.
Reserved. Write as 0.
ALS Interrupt Enable. When asserted permits ALS interrupts to be generated,
subject to the persist filter.
Wait Enable. This bit activates the wait feature. Writing a 1 activates the wait
timer. Writing a 0 disables the wait timer.
Reserved. Write as 0.
ADC Enable. This bit activates the four-channel (RGBC) ADC. Writing a 1
enables the ADC. Writing a 0 disables the ADC.
Power ON. This bit activates the internal oscillator to permit the timers and
ADC channels to operate. Writing a 1 activates the oscillator. Writing a 0
disables the oscillator and puts the part into a low power sleep mode. During
reads and writes over the I²C interface, this bit is temporarily overridden and
the oscillator is enabled, independent of the state of PON.
Page 14
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ams Datasheet
[v1-09] 2016-Jan-11