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A7101 Datasheet, PDF (9/22 Pages) AMIC Technology – 2.4GHz FSK Transceiver
A7101
Circuit Description
1. Low Noise Amplifier
The first stage of the receiver is a low noise amplifier. The main function of the LNA is to provide enough gain to overcome
noise generated by subsequent stages. In order to make the circuit less sensitive to parasitic parameters, and more tolerant to
common mode disturbances, differential pair is used. The LNA operates at very low power consumption with modest 20dB
voltage gain. It is internally matched to 50ohm. No other external components are required.
2. RF Mixer
The RF mixer is designed to translate incoming RF signal to intermediate frequency (IF). The mixer is a conventional double
balanced Gilbert cell mixer. Its output impedance is matched to 330ohm. A conventional 330ohm ceramic filter should be
connected between the mixer and the first limiter to filter out all un-wanted noise.
3. IF Limiter
The IF limiter consists of two stages:
The first IF limiter stage consists of 3 differential amplifiers and a single-ended output buffer. The output impedance of the
single-ended buffer is matched internally to 330 ohm, permitting direct connection to a 330ohm ceramic filter. A second filter
can be connected between the first limiter and the second limiter to increase the receiver selectivity. Minimum input level of
approximately 100mVRMS is required at the first limiter to generate a limited signal at the output of the second IF limiter. The
first IF limiter provides a gain of approximately 34dB. A by-pass capacitor of 10nF should be used to connect LIM1INN to
ground.
The second IF limiter consists of 4 differential amplifiers and a differential output buffer. The second IF limiter provides an
overall gain of approximately 40 dB. A by-pass capacitor of 10nF should be used to connect LIM2INN to ground. The limiter
output is fed directly to the FSK demodulator.
4. Demodulator
The demodulator demodulates the FSK signal. It consists of a quadrature multiplier, external LC tank circuit and a tuning circuit
to adjust the tank resonant frequency.
5. Low Pass Filter (LPF)
An internal operational amplifier connected with external RC components makes up the LPF. The bandwidth of LPF can be
determined by external RC values.
6. Data Slicer
The data slicer compares the output of low pass filter with internal reference voltage threshold, VREF and provides binary logic
signals. The data slicer output is open drain type and will be pull high when data is muted.
7. RESET
When SPI_CLOCK and SPI _LATCH are both held high simultaneously, bit 4 through bit 9 of the Mode Select Register will be
reset to “Low” state.
PRELIMINARY (March 2004, Version 0.4)
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AMIC Technology, Corp.