A7101 Datasheet, PDF (6/22 Pages) AMIC Technology – 2.4GHz FSK Transceiver

A7101
Pin Descriptions (I: input O: output OD: open drain output)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
VDD_A
RXDATA
BR_RX
NC
RFIO
BP_BUF
TXDATAIN
XTAL1
XTAL2
XTALOUT
CAPSW
BP_REG
LVOUT
LVIN
VDD_D
VOUT
17
SPI_DATA
18
SPI_CLOCK
19
SPI_LATCH
20
MODSEL0
24
MODSEL1
21
REGFB
22
EN_REG
23
VIN
25
LD
26
CHPOUT
27
BR_VCO
28
VT
29
BP_VCO
30
VDD_VCO
I/O
I
OD
O
I/O
O
I
I
I
O
I
O
O
I
I
O
I/OD
I
I
I
O
I
I
OD
O
O
I
O
I
Function Description
Analog supply voltage input.
Recovered data output. This pin is an open drain output.
Receiver band gap bias output. Connect to external resistor to set bias current.
This pin must be open.
RF input/output port.
Noise bypass. Connect to external noise rejection capacitor.
Transmitter data input.
Colpitts crystal oscillator node 1. Connect to external feedback capacitor.
Colpitts crystal oscillator node 2. Connect to external feedback capacitor.
Buffered crystal oscillator output.
Modulation switch input.
Regulator band gap bypass output. Connect to external noise rejection capacitor.
Typical output voltage is 1.2V.
Battery-Low voltage indicator output. This pin is active low when LVIN is below
BP_REG voltage level.
Input for battery-low voltage indicator. The indicator compares LVIN with the threshold
voltage, BP_REG.
Digital supply voltage input.
Regulator output voltage. Nominal voltage output is 2.5V.
Data for SPI interface.
This pin operates as an Input pin when SPI is in Write mode. This pin operates as an
open drain output when SPI is in Read mode.
Clock input for SPI interface.
Latch input for SPI interface.
Transceiver (embedded regulator is not included) operation mode selection inputs.
MODSEL[1:0] = 00: Sleep mode. Transceiver circuit is turned off.
MODSEL[1:0] = 01: Stand-by mode. X’TAL oscillator is turned on.
MODSEL[1:0] = 10: Transmit mode.
MODSEL[1:0] = 11: Receive mode.
Output from regulator feedback network. VOUT is set to nominal voltage when this pin
is opened. If other voltage is required, connect it to external resistor to adjust VOUT.
Voltage regulator enable pin. Signal is active high.
Supply voltage for the internal voltage regulator.
Output from PLL lock detector. This pin is active high (Open drain) when PLL is
locked.
Charge-pump output. This pin charges external capacitor to adjust VCO frequency.
VCO band gap bias output. Connect to external resistor to set bias current.
VCO tuning voltage input. The VCO frequency increases as VT increases.
Noise bypass. Connect to external noise rejection capacitor.
VCO supply voltage input.
PRELIMINARY (March 2004, Version 0.4)
5
AMIC Technology, Corp.