A31W65132 Datasheet, PDF (33/41 Pages) AMIC Technology – LCD Controller-Driver

Item
Address hold time
Address setup time
System cycle time
Data setup time
Data hold time
Access time
Output disable time
Enable H pulse time
Enable L pulse time
Read
Write
Read
Write
Signal
A0
A0
D0 to D7
E
E
Symbol
tAH6
tAW6
tCYC6
tDS6
tDH6
tACC6
tOH6
tEWHR
tEWHW
tEWLR
tEWLW
A31W65132 Series
(VDD = 2.7V to 4.5V Ta=-40 to 85°C)
Condition
Rating
Min.
Max.
Units
0
-
ns
0
-
ns
300
-
ns
40
-
ns
15
-
ns
CL = 100pF
-
140
ns
10
100
ns
120
-
ns
60
-
ns
60
-
ns
60
-
ns
(VDD = 2.4V to 2.7V Ta=-40 to 85°C)
Item
Signal
Symbol
Condition
Rating
Min.
Max.
Units
Address hold time
Address setup time
A0
tAH6
tAW6
0
-
ns
0
-
ns
System cycle time
A0
tCYC6
1000
-
ns
Data setup time
Data hold time
D0 to D7
tDS6
tDH6
80
-
ns
30
-
ns
Access time
Output disable time
tACC6
tOH6
CL = 100pF
-
280
ns
10
280
ns
Enable H pulse time
Read
E
tEWHR
Write
tEWHW
240
-
ns
120
-
ns
Enable L pulse time
Read
E
tEWLR
Write
tEWLW
120
-
ns
120
-
ns
Notes:
1. The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,
(tr + tf) ≤ (tCYC6 - tEWLW - tEWHW) for (tr + tf) ≤ (tCYC6 - tEWLR - tEWHR) are specified.
2. All timing is specified using 20% and 80% of VDD as the reference.
3. tEWLW and tEWLR are specified as the overlap between CS1 being “L” (CS2 = “H”) and E.
PRELIMINARY (February, 2001, Version 0.1)
32
AMIC Technology, Inc