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A31W65132 Datasheet, PDF (16/41 Pages) AMIC Technology – LCD Controller-Driver
A31W65132 Series
4. Command Execution
When the input at D0-D7 is interpreted as a command and it will be decoded and written to the corresponding command
register. The user can input the commands continuously without confirming the busy flag of status command register
because the command is completely executed within the cycle time (tCYC) according to the timing characteristics of the
command input. But that re-inputting the command within the executed cycle time is inhibited. The busy flag is outputted
to D7 pin with the read instruction, “H” indicates the chip is in busy state.
5. Data Bus Select
When CS1 is held at “H” level or CS2 is held at “L” level, the D0-D7 is in high impedance state.
68/80-Series
shared
A0
1
1
0
0
68-Series
R/ W
1
0
1
0
80-Series
Description
E
R/ W
0
1
Reads from Display Data RAM
1
0
Writes to Display Data RAM
0
1
Reads Status
1
0
Command Write to internal register
6. Display Data RAM
The Display Data RAM is made of dual port RAM. The size of the RAM is 64 x 132 + 132 = 8580 bits.
Write “L” or data to be displayed in all display data RAM before turning the display ON.
7. Accessing the Display Data RAM From MPU
In order to match the operating frequency of Display Data RAM with that of the MPU, a dummy read is required before the
first actual display data read. When the MPU reads the Display Data RAM, the first dummy read cycle stores the first read
data in the bus holder, and then at the next read cycle the MPU read the first read data from the bus holder.
It does not need a dummy cycle when MPU writes data to the Display Data RAM. When the MPU write data to Display
Data RAM, once the data is stored in the bus holder, then it is written to Display Data RAM before the next data write
cycle.
8. Set Column Address (higher, lower nibble)
This command specifies the column address (higher and lower nibble) of the Display Data RAM. The column address will
be incremented automatically by each data access after it is pre-set by the MPU. The incrementation of column addresses
stops with 83H.
9. Set Page Address (0-8)
This command positions the page address to 0 of 8 possible positions in Display Data RAM. Page 0-7 are the graphic
display area, and the page 8 are the icon display area. The icon display data is valid for only D0.
10. Set display start line (0-63)
The command is used to change the display page or smooth scroll.
With the display start line value equals to 0, D0 of page 0 is mapped to COM1. The display start line values of 0 to 63
are assigned to page 0 to 7.
PRELIMINARY (February, 2001, Version 0.1)
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AMIC Technology, Inc