A25L010A Datasheet, PDF (11/44 Pages) AMIC Technology – 1Mbit Low Voltage, Serial Flash Memory

Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4.) sets the
Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and
Write Status Register (WRSR) instruction.
A25L010A Series
The Write Enable (WREN) instruction is entered by driving
Chip Select ( S ) Low, sending the instruction code, and then
driving Chip Select ( S ) High.
Figure 4. Write Enable (WREN) Instruction Sequence
S
01 23 45 67
C
Instruction
DIO
High Impedance
DO
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 5.) resets the
Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip
Select ( ^S ) Low, sending the instruction code, and then driving
Chip Select ( S ) High. The Write Enable Latch (WEL) bit is
reset under the following conditions:
ï¹£ Power-up
ï¹£ Write Disable (WRDI) instruction completion
ï¹£ Write Status Register (WRSR) instruction completion
ï¹£ Page Program (PP) instruction completion
ï¹£ Sector Erase (SE) instruction completion
ï¹£ Block Erase (BE) instruction completion
ï¹£ Chip Erase (CE) instruction completion
Figure 5. Write Disable (WRDI) Instruction Sequence
S
01 23 45 67
C
Instruction
DIO
High Impedance
DO
(November, 2014, Version 1.5)
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