N04L1630C2B Datasheet, PDF (5/12 Pages) AMI SEMICONDUCTOR – 4Mb Ultra-Low Power Asynchronous CMOS SRAMs 256K × 16 bit POWER SAVER TECHNOLOGY TM

AMI Semiconductor, Inc.
Power Savings with Page Mode Operation (WE = V_IH)
N04L1630C2B
Advance Information
Page Address (A0, A5 - A17)
Word Address (A1 - A4)
Word 1
Open page
Word 2
...
CE1
CE2
Word 16
OE
LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 16-bit words of data are read from the open page. By treating addresses A1-A4 as the least significant
bits and addressing the 16 words within the open page, power is reduced to the page mode value which is
considerably lower than standard operating currents for low power SRAMs.
(DOC# 14-02-042 ReI I ECN# 01-1374
The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com.