AMIS-720341 Datasheet, PDF (13/16 Pages) AMI SEMICONDUCTOR – Contact Image Sensor

AMIS-720341-A: Contact Image Sensor
Data Sheet
12.0 Switching Characteristics at 25^°C
The timing relationships of the video output voltage and its two input clocks, the SP and the shift register clock (CP), along with the shift
register (EOS) output clock are shown in Figure 11. The switch timing specification for the symbols on the timing diagram is given in
Table 9. The digital clocks' levels are +5V CMOS compatible. The video, IOUT, is defined in Figure 4.
Figure 11: Timing Diagram of the AMIS-720341-A Sensor
Table 9: Timing Symbol's Definition
Item
Symbol
Min.
Mean
Max.
Units
Clock cycle time
Clock pulse width⁽¹⁾
to
200
tw
50
10000
ns
ns
Clock duty cycle
25
50
75
%
Data setup time
tds
20
ns
Data hold time
tdh
20
ns
Prohibit crossing time⁽²⁾
tprh
20
ns
EOS rise delay
terdl
60
ns
EOS fall delay
tefdl
70
ns
Signal delay time⁽³⁾
tdl
20
ns
Signal settling time⁽³⁾
ts/h
120
ns
Notes:
(1) The clock pulse width, tw, varies with frequency, as well as the duty cycle.
(2) Prohibit crossing time is to insure that no two SPs are locked into the shift register for any single scan time. Since the SP is entered into the shift register during
its active high level when the CP clock edges falls, the active high of the SP is permitted only during one falling, CP, clock edges for any given scan. Otherwise,
multiple SPs will load into the shift register.
(3) Pixel delay times and settling times depend on the employment of the output amplifier. These values, tdl and ts/h, are measured with the amplifier (see Figure
12) using the AMIS-720341-A sensors. Note that the impulse signal current out of the device has a pulse width ~ 30ns. Hence, the faster the amplifier with a
faster settling time will yield a signal video pulse with faster rise and settle times.
AMI Semiconductor – May 06, M-20570-001
13
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