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| AM49DL640BG Datasheet, PDF (57/62 Pages) SPANSION – Stacked Multi-Chip Package (MCP) Flash Memory and SRAM | |||
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PRELIMINARY
pSRAM AC CHARACTERISTICS
tWC
Addresses
A0 to A20
tAS
WE#
tWP
tWR
CE#1
CE2
UB#, LB#
DOUT
I/O1 to 16
DIN
I/O1 to 16
tCW
tCH
tBW
High-Z
tCOE
tBE
tODW
(Note 1)
tDS
tDH
Valid Data In
Notes:
1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied.
2. If OE# is high during the write cycle, the outputs will remain at high impedance.
Figure 32. Pseudo SRAM Write Cycleâ
UB#s and LB#s Control
High-Z
56
Am49DL640BG
March 8, 2002
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