AMD-750 Datasheet, PDF (5/12 Pages) Advanced Micro Devices – Chipset

23016A—August 1999
AMD-750™ Chipset Overview
AMD-751™ System Controller
Key features of the AMD-751 system controller are provided in
this section. For more information, see the AMD-751™ System
Controller Data Sheet, order# 21910.
The AMD-751 system controller is designed with the following
features:
n The AMD Athlon frontside bus supports three 200-MHz
high-speed channels
n The 33-MHz 32-bit PCI 2.2-compliant bus interface supports
up to six masters
n The 66-MHz AGP 2.0-compliant interface supports 2x data
transfer mode
n High-speed memory—The AMD-751 system controller is
designed to support 100-MHz PC-100 revision 1.0 SDRAM
DIMMs
AMD Athlon™ System Bus
The AMD Athlon frontside bus has the following features:
n High-performance point-to-point system bus topology
n Source synchronous clocking for high-speed transfers
n HSTL-like low-voltage swing transceiver logic signal levels
n Three 200-MHz independent high-speed channels:
• 13-pin processor request channel
• 13-pin system probe channel
• 72-pin data transfer channel (8-bit ECC)
n 1.6 Gbytes per second peak-data-transfer rates at 200 MHz
n Large 64-byte (cache line) data burst transfers
n Data Buffers:
• Memory write FIFO (MWF)
• Memory read FIFO (MRF)
• PCI/APCI (AGP-PCI) write buffer
• PCI/APCI read buffer
AMD-751™ System Controller
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