AMMCL00XA Datasheet, PDF (28/36 Pages) Advanced Micro Devices – 2 or 4 Megabyte 3.0 Volt-only Flash Miniature Card

PRELIMINARY
AC CHARACTERISTICS-ALTERNATE CE# CONTROLLED WRITES
Write/Erase/Program Operations
Parameter Symbols
JEDEC
Standard Parameter Description
-150
Unit
t_AVAV
t_WC
Write Cycle Time
Min
150
ns
t_AVEL
t_AS
Address Setup Time
Min
10
ns
t_ELAX
t_AH
Address Hold Time
Min
50
ns
t_DVEH
t_DS
Data Setup Time
Min
50
ns
t_EHDX
t_DH
Data Hold Time
Min
0
ns
t_GLDV
t_OEH
Output Enable Hold Time for Embedded Algorithm
Min
10
ns
t_GHEL
Read Recovery Time before Write
Min
0
µs
t_WLEL
t_EHWH
t_ELEH
t_EHEL
t_EHEH3
t_WS
t_WH
t_CP
t_CPH
WE# Setup Time before CE#
WE# Hold Time
CE# Pulse Width
CE# Pulse Width HIGH (Note 3)
Embedded Programming Operation (Notes 3,4)
Min
0
ns
Min
0
ns
Min
50
ns
Min
20
ns
Typ
9
Max
300
µs
t_EHEH4
Embedded Erase Operation for each 64K byte Memory
Typ
1.5
Sector (Notes 1, 2)
Max
15
s
t_VCS
V_CC Setup Time to Write Enable LOW
Min
50
µs
Notes:
1. Rise/fall time ≤10 ns.
2. Maximum specification not needed due to the internal stop timer that will stop any erase or write operation that exceed the
device specification.
3. Card Enable Controlled Programming:
Flash Programming is controlled by the valid combination of the Card Enable (CE1#, CE2#) and Write Enable (WE#) signals.
For systems that use the Card Enable signal(s) to define the write pulse width, all setup, hold, and inactive write enable timing
should be measured relative to the Card Enable signal(s).
4. Under worst case condition of 90° C, Vcc = 2.7 V, 100,000 cycles. Excludes system level overhead, the time required to
execute the four bus cycle command necessary to program each byte.
28
AmMCL00XA