AM29PDL129H Datasheet, PDF (13/49 Pages) SPANSION – 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control and Dual chip Enable

Bank
Sector
SA1-0
SA1-1
SA1-2
SA1-3
SA1-4
SA1-5
SA1-6
SA1-7
SA1-8
SA1-9
SA1-10
SA1-11
SA1-12
SA1-13
SA1-14
SA1-15
SA1-16
SA1-17
SA1-18
SA1-19
SA1-20
SA1-21
SA1-22
SA1-23
SA1-24
SA1-25
SA1-26
SA1-27
SA1-28
SA1-29
SA1-30
SA1-31
SA1-32
SA1-33
SA1-34
SA1-35
SA1-36
SA1-37
Table 4. Am29PDL129H Sector Architecture
CE1#
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CE2#
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Sector Address (A21- Sector Size
A12)
(Kwords)
0000000XXX
32
0000001XXX
32
0000010XXX
32
0000011XXX
32
0000100XXX
32
0000101XXX
32
0000110XXX
32
0000111XXX
32
0001000XXX
32
0001001XXX
32
0001010XXX
32
0001011XXX
32
0001100XXX
32
0001101XXX
32
0001110XXX
32
0001111XXX
32
0010000XXX
32
0010001XXX
32
0010010XXX
32
0010011XXX
32
0010100XXX
32
0010101XXX
32
0010110XXX
32
0010111XXX
32
0011000XXX
32
0011001XXX
32
0011010XXX
32
0011011XXX
32
0011100XXX
32
0011101XXX
32
0011110XXX
32
0011111XXX
32
0100000XXX
32
0100001XXX
32
0100010XXX
32
0100011XXX
32
0100100XXX
32
0100101XXX
32
Address Range (x16)
000000h–007FFFh
008000h–00FFFFh
010000h–017FFFh
018000h–01FFFFh
020000h–027FFFh
028000h–02FFFFh
030000h–037FFFh
038000h–03FFFFh
040000h–047FFFh
048000h–04FFFFh
050000h–057FFFh
058000h–05FFFFh
060000h–067FFFh
068000h–06FFFFh
070000h–077FFFh
078000h–07FFFFh
080000h–087FFFh
088000h–08FFFFh
090000h–097FFFh
098000h–09FFFFh
0A0000h–0A7FFFh
0A8000h–0AFFFFh
0B0000h–0B7FFFh
0B8000h–0BFFFFh
0C0000h–0C7FFFh
0C8000h–0CFFFFh
0D0000h–0D7FFFh
0D8000h–0DFFFFh
0E0000h–0E7FFFh
0E8000h–0EFFFFh
0F0000h–0F7FFFh
0F8000h–0FFFFFh
100000h–107FFFh
108000h–10FFFFh
110000h–117FFFh
118000h–11FFFFh
120000h–127FFFh
128000h–12FFFFh
November 2, 2005
Am29PDL129H
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