S5935 Datasheet, PDF (65/190 Pages) Applied Micro Circuits Corporation – PCI 5V Bus Master/Target Device 32-bit

PCI BUS OPERATION REGISTERS
MASTER CONTROL/STATUS
REGISTER (MCSR)
Register Name: Master Control/Status
PCI Address Offset: 3Ch
Power-up value: 000000E6h
Attribute:
Read/Write, Read Only,
Write Only
Size:
32 bits
This register provides for overall control of this de-
vice. It is used to enable bus mastering for both data
directions as well as providing a method to perform
software resets.
The following PCI bus controls are available:
• Write Priority over Read
• Read Priority over Write
• Write Transfer Enable
• Write master requests on 4 or more FIFO words
available (full)
• Read transfer enable
S5935
• Read master requests on 4 or more FIFO
available (empty)
• Assert reset to Add-On
• Reset Add-On to PCI FIFO flags
• Reset PCI to Add-On FIFO flags
• Reset mailbox empty full status flags
• Write external non-volatile memory
The following PCI interface status flags are provided:
• PCI to Add-On FIFO FULL
• PCI to Add-On FIFO has four or more empty
locations
• PCI to Add-On FIFO EMPTY
• Add-On to PCI FIFO FULL
• Add-On to PCI FIFO has four or more words
loaded
• Add-On to PCI FIFO EMPTY
• PCI to Add-On Transfer Count = Zero
• Add-On to PCI Transfer Count = Zero
Figure 8. Bus Master Control/Status Register
Control
Status
31 29 27 24 23
16 15 14 12 10 8 7 6 5
0
0
0
0 ^Bit
Value
nvRAM Access Ctrl
Reset Controls (R/WC)
D27=Mailbox Flags Reset
D26=Add-on to PCI FIFO
Status Flags Reset
D25=PCI to Add-on FIFO
Status Flags Reset
D24=Add-On Reset
nv operation
address/data
Memory Read Multiple
Enable = 1
Disable = 0
Read Transfer Control (R/W)
(PCI memory reads)
D14=Read Transfer Enable
D13=FIFO Management Scheme
D12=Read vs. Write Priority
FIFO STATUS (RO)
D5=Add-on to PCI FIFO Empty
D4=Add-on to PCI FIFO 4+ Words
D3=Add-on to PCI FIFO Full
D2=PCI to Add-on FIFO Empty
D1=PCI to Add-on FIFO 4+Spaces
D0=PCI to Add-on FIFO Full
D7=Add-on to PCI Transfer Count
equals zero (R0)
D6=PCI to Add-on Transfer Count
equals zero (R0)
Write Transfer Control (R/W)
(PCI memory writes)
D10=Write Transfer Enable
D9=FIFO Management Scheme
D8=Write vs Read Priority
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