CS19202CBI30 Datasheet, PDF (1/2 Pages) Applied Micro Circuits Corporation – STS-192 SONET/SDH FRAMER AND POS/ATM MAPPER

Part Number - S19202CBI30
Product Brief Revision 3.1 - January 2002
GANGES
PRODUCT BRIEF
STS-192 SONET/SDH FRAMER AND POS/ATM MAPPER
Features
General Description
• Supports full duplex mapping of ATM cells or packets for a
single STS-192c/AU-4-64c, four STS-48c/AU-4-16c or six-
teen STS-12c/AU-4-4c SONET/SDH payloads.
The Ganges IC is a highly integrated VLSI device that pro-
vides full duplex mapping of Packets or ATM cells into
SONET/SDH payloads at rates up to 9.95Gb/s.
• Supports a single STS-192/STM-64 or quad STS-48/STM-
16 line interfaces on the line side and on the protection
port. Each STS-48/STM-16 can support a concatenated
payload or can be channelized down to STS-12c/AU-4-4c.
• Terminates and generates SONET/SDH section, line, &
path layers on the line side and APS port, with transport/
section E1, E2, F1 and DCC overhead interfaces in both
transmit and receive directions.
• Supports independent loop timing when in quad STS-48/
STM-16 mode.
• Supports protection switching (APS) between two Ganges
devices or between two fiber optics modules
• Provides an Optical Internetworking Forum (OIF) SFI-4
compliant 622.08 MHz, 16-bit bus LVDS interface on the
line side in both the TX and RX directions.
• Provides a 64-bit, 200 MHz FlexBus 4 system interface
that supports the transfer of either packets or ATM cells.
• Support mixed ATM and POS data termination, config-
urable on a per-tributary basis
• 16-bit synchronous microprocessor interface for configura-
tion, control, and status monitoring.
• Packaged in a 624-pin CBGA.
Ganges provides full section and line overhead processing
for either a single STS-192/STM-64, or four STS-48/STM-16.
It supports framing, scrambling and descrambling, alarm sig-
nal insertion and detection, and bit interleaved parity (B1/B2)
processing. It also provides path overhead processing for
STS-192c/AU-4-64c, STS-48c/AU-4-16c or STS-12c/AU-4-
4c SONET/SDH payloads and includes bit interleaved parity
(B3) processing.
The automatic protection switching (APS) port of the Ganges
supports generation and termination of SONET/SDH section
and line, as well as TOH insertion and extraction. This allows
inter-device protection switching between two Ganges
devices or intra-device protection between two fiber optics
modules.
The Ganges is SONET/SDH standards compliant with
Bellcore GR-253, ITU G.707, and ANSI T1.105 -1995.
Applications
• Core ATM switches and IP Routers (POS)
• ATM, POS and Frame Relay line cards in Edge and Metro
Switches
• Direct Mapping of any traffic type in SONET/SDH STS-192/
STM-64 and STS-48/STM-16 payloads
• Implemented in .18 micron, 1.8V and 2.5V technology.
S19202 Block Diagram
TX_CLK_OUT[1:4]
TX_DATA_OUT[15:0]
RX_DATA_IN[15:0]
RX_CLK_IN_[1:4]
LOC
DET
TOH INSERT
FRGFERNT_x4X
PROT TX
FR GEN x4
MUX
SEL
LBK
SEL
FTROMHR
MON.
x4
TOH EXTRACT
S
E
L
RX PROT
FRM x4
MICROPROCESSOR I/F
SPE/VC
GENERATOR
x16
POH
GENERATION
x16
HD/LC /ATM
Proc _x16
SYSTEM
INTRFC/
ATM/POS
FIFO
x16
POINTER
INTERPRETER
x16
MONITOR
POH
x16
JTAG
HDLC /ATM
Proc _x16
SYSTEM
INTRFC/
ATM/POS
FIFO_x16
Control
STX_DATA_IN[63:0]
SRX_DATA_OUT[63:0]
Control
AMCC
Production Release Information - The information con-
tained in this document is about a product in its fully tested
and characterized stage. All features described herein are
supported. Contact AMCC for updates to this document and
the latest product status.